Xilinx brings breakthroughs to Vivado design tools, providing the most advanced machine learning optimization for accelerating design

San Jose, California -- (Business Wire) -- Xilinx, Inc. (NASDAQ: XLNX) today launched Vivado ML Editions, the industry's first FPGA EDA toolkit based on machine learning (ML) optimization algorithms, as well as team based advanced tools

Time: February 28, 2024 21:33:17 Author: Click: 100

San Jose, California -- (Business Wire) -- Xilinx, Inc. (NASDAQ: XLNX) today launched Vivado ML Editions, the industry's first FPGA EDA toolkit based on machine learning (ML) optimization algorithms, and a team based advanced design process that can significantly save design time and costs. Compared to the current Vivado HLx version, the Vivado ML version has a 5-fold increase in compilation time and an average improvement of 10% in result quality (QoR).

Today's EDA designers face the challenge of increasing design complexity. Nick Ni, Director of Marketing, Software, and Artificial Intelligence Solutions at Xilinx, said, "Machine learning is the next major leap in accelerating the design process and achieving QoR benefits. Vivado ML will help developers shorten the design cycle and provide a new level of productivity from design creation to completion

Optimization based on maximum likelihood

Vivado ML Editions supports ML based algorithms to accelerate design completion. This technology has ML based logic optimization, delay estimation, and intelligent design operation, which can automatically execute strategies to reduce temporal convergence iterations.

The intelligent design and operation of the new Vivado ML version is a game changer, "said Robert Atkinson, Chief Hardware Engineer at National Instruments. By providing a button based approach to actively improve timing results, it can generate QoR recommendations, bring maximum impact, and deliver expert quality results while reducing user analysis, especially for difficult to complete designs. "

Faster compilation time and team based productivity

Xilinx also introduced the concept of abstract shells, which allow users to define multiple modules in the system for incremental and parallel compilation. Compared to traditional full system compilation, this reduces the average compilation time by 5 times, with a maximum reduction of 17 times. Abstract shells also help protect customers' intellectual property by hiding design details outside of modules, which is crucial for applications such as FPGA-as-a-Service and value-added system integrators.

In addition, Vivado ML Editions has improved its collaborative design with Vivado IP integrator, which supports modular design using a new 'block design container' feature. This ability promotes team based design methods and allows for a divide and conquer strategy to handle large-scale designs involving multi site collaboration.

Unique adaptive features, such as Dynamic Function Exchange (DFX), enable more efficient utilization of chip resources by dynamically loading customized hardware accelerators during runtime. With the ability of DFX to load design modules in milliseconds, it has opened up new use cases, such as cars exchanging different visual algorithms during frame processing, or genome analysis exchanging different algorithms in real-time during DNA sequencing.